Quick-and-dirty memory access tracing with instruction-based sampling
- With the increasing deployment of heterogeneous memory architectures, the efficient execution of a workload becomes more sensitive to fine-grained memory placement decisions. To establish a sound information base for such decisions, we must first understand memory access behavior beyond the level of coarse-grained statistics. However, collecting detailed memory traces is a costly process. Therefore, we propose a low-overhead solution based on instruction-based sampling that provides incomplete yet informative access sequences. We showcase the practical value of such sparse traces by analyzing the overhead and comparing workload runs on two memory technologies with distinct characteristics.
Author: | Lukas WenzelGND, Sven KöhlerGND, Henriette HofmeierGND, Felix EberhardtGND |
---|---|
URN: | urn:nbn:de:hbz:294-102705 |
DOI: | https://doi.org/10.13154/294-10270 |
Parent Title (English): | 17th USENIX Symposium on Operating Systems Design and Implementation (OSDI'23) |
Document Type: | Conference Proceeding |
Language: | English |
Date of Publication (online): | 2023/09/11 |
Date of first Publication: | 2023/09/11 |
Publishing Institution: | Ruhr-Universität Bochum, Universitätsbibliothek |
Tag: | hardware performance counter; instruction-based sampling; memory management; workload profile |
Dewey Decimal Classification: | Allgemeines, Informatik, Informationswissenschaft / Informatik |
open_access (DINI-Set): | open_access |
faculties: | Fakultät für Informatik |
Licence (German): | Keine Creative Commons Lizenz - es gelten die Rechteeinräumung und das deutsche Urheberrecht |